Senior ASIC Design Engineer (ASIC, FPGA) Working with an exciting start up developing next generation software and hardware to accelerate 5G mobile communications. Turbo charging performance through innovations in Firmware. Your skills in ASIC design will be essential to develop new high-performance IP solutions & patents.

Key Skills

• Contribute to the optimisation, synthesis and characterisation of ASIC solutions
• Support customers in the validation, synthesis and integration of ASIC solutions

• Optimisation, synthesis, characterisation, validation and integration of ASIC solutions (at 16 nm or below)
• Experience of developing Python and TCL scripts for synthesis, static timing closure and formal verification
• Experience of power estimation tools and power-aware physical design flow
• Proficiency in EDA tools (Synopsys and/or Cadence) and process libraries
• Adept at providing technical support, working with customers during the integration phase of their projects
• Version control and peer review (e.g. Git)
• Documentation (e.g. Confluence)
• Time management (e.g. Jira)

Desirable:

• Experience of porting FPGA designs to ASIC targets
• Experience of ASIC synthesis and back-end processes
• Experience of back-end flow including floorplanning, LVS/DRC, UPF
• Experience of DFT techniques and tools including MEMBIST
• Automation (e.g. Jenkins)
• Knowledge of communications signal processing algorithms (ideally error correction, equalisation, channel estimation, beamforming or another baseband component)

Matchtech acts as an employment agency for permanent recruitment and employment business for the supply of temporary workers and is part of Gattaca Plc.

Gattaca Plc provides support services to Matchtech and may assist with processing your application.