Senior Implementation Engineer – RTL Debugging / LEC / STA / TCL / Cadence

Opportunity with a recognised Semiconductor company in Sheffield with a leading systems group. 10 month initial contract- likely to extend and starting May 1st.

As a Senior Implementation Engineer, you will need:

·       Knowledge of IC Design flow.

·       Experience with Synthesis / place and route / LEC / STA

·       Experience with Tcl / Python / Perl

·       Experience working/ knowledge of work in nanometre scale

·       Knowledge of HDL languages like Verilog or System Verilog

If you are interested in this Senior Implementation Engineer role, please send a CV to [email protected] 

Keywords: RTL Debugging / LEC / STA / TCL / Cadence

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